Red Pitaya Hardware Specifications V1.1.1
Product name: Red Pitaya, model V1.1
RF inputs
Number of channels: 2
Bandwidth: 50 MHz (3 dB)
Sample rate: 125 Msps
ADC resolution 14 bits
Input coupling: DC
Input noise level: < 119 dBm /Hz (D)
Input impedance: 1 M? // 10 pF (A,B)
Full scale voltage: 2Vpp, (46 Vpp for lowgain jumper setting) (T,V)
DC offset error: <5 % FS (G)
gain error: < 3% (at high gain jumper setting), <10% (at low gain jumper setting) (G)
Absolute maximum input voltage rating: 30 V (S) (1500 V ESD)
Overload protection: protection diodes (under the input voltage rating conditions)
Input channel isolation: typical performance 65 dB @ 10 kHz, 50 dB @ 100 kHz, 55 dB @ 1 M, 55 dB @ 10 MHz, 52 dB @ 20 MHz, 48 dB @ 30 MHz, 44 dB @ 40 MHz, 40 dB @ 50 MHz. (C)
Harmonics
at 3 dBFS: typical performance <45 dBc (E)
at 20 dBFS: typical performance <60 dBc (E)
Spurious frequency components: Typically <90 dBFS (F)
Connector type: SMA (U)
Frequency response is adjusted by digital compensation
RF outputs
Number of channels: 2
Bandwidth: 50 MHz (3 dB) (K)
Sample rate: 125 Msps
DAC resolution: 14 bits
Output coupling: DC
Load impedance: 50 ? (J)
Output slew rate limit: 200 V/us
Connector type: SMA (U)
DC offset error: < 5% FS (G)
Gain error: < 5% (G)
Full scale power: > 9 dBm (L)
Harmonics: typical performance: (at 8 dBm)
51 dBc @ 1 MHz
49 dBc @ 10 MHz
48 dBc @ 20 MHz
53 dBc @ 45 MHz
Auxiliary analog input channels:
Number of channels: 4
Nominal sampling rate: 100 ksps (H)
ADC resolution 12 bits
Connector: dedicated pins on IDC connector E2 (pins 13,14,15,16)
Input voltage range: 0 to +3.5 V
Input coupling: DC
Auxiliary analog output channels
Number of channels: 4
Output type: Low pass filtered PWM (I)
PWM time resolution: 4ns (1/250 MHz)
Connector: dedicated pins on IDC connector E2 (pins 17,18,19,20)
Output voltage range: 0 to +1.8 V
Output coupling: DC
General purpose digital input/output channels: (N)
Number of digital input/output pins: 16
Voltage level: 3.3 V
Direction: configurable
Location: IDC connector E1 (pins 324 )
Extension:
Connector: 2 x 26 pins IDC (M)
Power supply:
Available voltages: +5V, +3.3V, 3.3V
Current limitations: 500 mA for +5V and +3.3V (to be shared between extension module and USB devices), 50 mA for 3.3V supply.
Serial connectivity:
Connector type: 2x “SATA type” connector
Two differential pairs per connector enabling up to 500 Mbps
CPU / FPGA: Xilinx Zynq 7010 SoC
17,600 LUTs
28k Logic Cells
80 DSP slices
Dual ARM® Cortex™A9
Memory: 4 Gb DDR3 SDRAM (512 MB)
SD card:
Card type: micro SD
Supported standard: SD/SDIO 2.0/MMC3.31
File System: FAT32 (255 heads, 63 sectors)
Maximum card size: 32 GB (tested with: Apacer microSD HC 4GB Class 4 and others)
WiFi:
WiFi USB dongles: tested with Edimax EW7811Un
Fan: Optional fan power supply (5V)
Power supply: (O)
Voltage: 5 V
Current: 2 A
Connector type: micro USB
Compliant with relevant regulation standards
Recommended power supply: HNP10ImicroUSB
Dimensions: 107 mm x 60 mm x 21 mm (W)
Power consumption: typically < 0.9 A @ 5V (P)
Environmental conditions:
Temperature:
Minimum ambient operating temperature: 5 °C
Maximum ambient operating temperature: 30 °C (P)
Storage temperature range from 50 °C to 150 °C
Laboratory ambient temperature range: 22 °C ± 2 °C (R)
Exposed surface temperature: < 70 °C (Q)
Maximum Zynq SoC IC operation temperature: 85 °C
Humidity: 15 % 85 % (non condensing)
Red Pitaya Hardware Specifications V1.1.1
Red Pitaya Hardware Specifications V1.1.1
Die Bässe breit die Höhen schmal das ist der Funk aus Wuppertal.
Re: Red Pitaya Hardware Specifications V1.1.1
Als gegenüberstellung hier die technischen Daten vom IC 7300.
Here are some salient features:
HF/6m, 100W output on all bands
EU version: HF/6m/4m (50W on 4m)
SSB/CW receiver sensitivity, preamp on: (2.4 kHz, 10dB S+N/N): HF 0.15μV (-123 dBm), 6m 0.12μV (-125 dBm)
Separate HF and 6m receiver preamps (Preamp 1 for HF, Preamp 2 for 6m)
Modes: SSB (J3E), CW (A1A), RTTY (F1B), AM (A3E), FM (F3E)
Frequency stability: 5 * 10-7 (-10...+60°C)
Direct-sampling SDR (software-defined radio) receiver architecture
ADC: 16-bit. FPGA: Altera EP4CE55F2317N. DSP: TI TMS320C6745 (375-456 MHz, low power consumption). DAC: Intersil ISL5857IAZ.
ADC sampling rate: 150 megasamples/sec
Receiver signal path: RF preselector - ADC - FPGA - DSP - DAC - AF stage
15 bandpass filters in RF preselector
New "IP+" feature extends ADC dynamic range when strong signals are present
Selectable 16 dB attenuator for LF/MF RX range (30 kHz - 1.6 MHz)
ADC overflow (clip) indicator: OVF displayed on screen
Turn down RF GAIN when OVF display appears
Digital up-conversion (DUC) transmitter architecture using FPGA driving DAC
Transmitter signal path: Baseband amplifier - ADC - DSP - FPGA - DAC - RF BPF - ALC - PA - LPF
FPGA also performs digital down-conversion, frequency control and decimation (RF sub-band to baseband) digitally
FPGA executes TX functions: digital up-conversion (baseband to RF band) and frequency control
Improved phase noise performance due to low-noise ADC clock source (typ. RMDR: 97 dB at 1 kHz offset)
Fully-digital FFT spectrum scope and digitally-generated screen image; FPGA drives display processor via digital bus
Real-time, high-resolution spectrum scope includes waterfall
Scope span range ±5 kHz to ±1 MHz; amplitude range 80 dB; peak hold (continuous or 10 sec. hold time)
Scope features: selectable reference level (-20 to +20 dB), sweep speed, averaging & VBW (video bandwidth)
Audio spectrum analyser/oscilloscope screen (as in IC-7851, IC-7800, IC-7700)
Large colour TFT touch-screen display; screen selection via menu
Frequency change by touching scope screen
Multi-dial knob opens on-screen menus; menu items selected by touching screen
Band selection and 10-key numeric "keypad" via touch-screen menus
Familiar Icom NR, NB, Twin PBT, DSP filtering and notch controls
RTTY decoder/display function
Built-in relay-type high-speed autotuner with latching relays
Tuner matching range: 16.7 - 150Ω (3:1 VSWR)
"Enforced tuning" function for emergency operation with poorly-matched antennas (reduced output)
Rear-panel socket for AH-4 external autotuner
Acoustically-baffled speaker for excellent receive sound
Front-panel SD card slot
Rear-panel USB port for CI-V and audio/baseband/12 kHz DRM IF input/output
RS-BA1 compatibility (the spectrum scope with the waterfall can be observed on the PC screen)
Compact size: 240(W)×238(D)×95(H) mm, 4.1 kg.
Here are some salient features:
HF/6m, 100W output on all bands
EU version: HF/6m/4m (50W on 4m)
SSB/CW receiver sensitivity, preamp on: (2.4 kHz, 10dB S+N/N): HF 0.15μV (-123 dBm), 6m 0.12μV (-125 dBm)
Separate HF and 6m receiver preamps (Preamp 1 for HF, Preamp 2 for 6m)
Modes: SSB (J3E), CW (A1A), RTTY (F1B), AM (A3E), FM (F3E)
Frequency stability: 5 * 10-7 (-10...+60°C)
Direct-sampling SDR (software-defined radio) receiver architecture
ADC: 16-bit. FPGA: Altera EP4CE55F2317N. DSP: TI TMS320C6745 (375-456 MHz, low power consumption). DAC: Intersil ISL5857IAZ.
ADC sampling rate: 150 megasamples/sec
Receiver signal path: RF preselector - ADC - FPGA - DSP - DAC - AF stage
15 bandpass filters in RF preselector
New "IP+" feature extends ADC dynamic range when strong signals are present
Selectable 16 dB attenuator for LF/MF RX range (30 kHz - 1.6 MHz)
ADC overflow (clip) indicator: OVF displayed on screen
Turn down RF GAIN when OVF display appears
Digital up-conversion (DUC) transmitter architecture using FPGA driving DAC
Transmitter signal path: Baseband amplifier - ADC - DSP - FPGA - DAC - RF BPF - ALC - PA - LPF
FPGA also performs digital down-conversion, frequency control and decimation (RF sub-band to baseband) digitally
FPGA executes TX functions: digital up-conversion (baseband to RF band) and frequency control
Improved phase noise performance due to low-noise ADC clock source (typ. RMDR: 97 dB at 1 kHz offset)
Fully-digital FFT spectrum scope and digitally-generated screen image; FPGA drives display processor via digital bus
Real-time, high-resolution spectrum scope includes waterfall
Scope span range ±5 kHz to ±1 MHz; amplitude range 80 dB; peak hold (continuous or 10 sec. hold time)
Scope features: selectable reference level (-20 to +20 dB), sweep speed, averaging & VBW (video bandwidth)
Audio spectrum analyser/oscilloscope screen (as in IC-7851, IC-7800, IC-7700)
Large colour TFT touch-screen display; screen selection via menu
Frequency change by touching scope screen
Multi-dial knob opens on-screen menus; menu items selected by touching screen
Band selection and 10-key numeric "keypad" via touch-screen menus
Familiar Icom NR, NB, Twin PBT, DSP filtering and notch controls
RTTY decoder/display function
Built-in relay-type high-speed autotuner with latching relays
Tuner matching range: 16.7 - 150Ω (3:1 VSWR)
"Enforced tuning" function for emergency operation with poorly-matched antennas (reduced output)
Rear-panel socket for AH-4 external autotuner
Acoustically-baffled speaker for excellent receive sound
Front-panel SD card slot
Rear-panel USB port for CI-V and audio/baseband/12 kHz DRM IF input/output
RS-BA1 compatibility (the spectrum scope with the waterfall can be observed on the PC screen)
Compact size: 240(W)×238(D)×95(H) mm, 4.1 kg.
Die Bässe breit die Höhen schmal das ist der Funk aus Wuppertal.
Re: Red Pitaya Hardware Specifications V1.1.1
Moin zusammen.
ich habe hier noch eine ergänzende Information zu der RP Hardware.
Sicher interessant für Soft und Hardware Entwickler
ich habe hier noch eine ergänzende Information zu der RP Hardware.
Sicher interessant für Soft und Hardware Entwickler
Re: Red Pitaya Hardware Specifications V1.1.1
Vielen Dank.
Das erklärt nun auch Gerds Frontend.
73, Marcus
Das erklärt nun auch Gerds Frontend.
73, Marcus
Re: Red Pitaya Hardware Specifications V1.1.1
Hallo Red Pitaya Gemeinde,
in Ergänzung zu DL2BBF´s Beitrag möchte ich die
"Black-Box Amplifier & Filter" im Eingang des RP mal öffnen.
Es handelt sich um den LTC6403-1.
73 Wolfgang, DL9UFB
in Ergänzung zu DL2BBF´s Beitrag möchte ich die
"Black-Box Amplifier & Filter" im Eingang des RP mal öffnen.
Es handelt sich um den LTC6403-1.
73 Wolfgang, DL9UFB
- Dateianhänge
-
LTC6403-1.pdf
- (236.52 KiB) 560-mal heruntergeladen
Re: Red Pitaya Hardware Specifications V1.1.1
Guten Tag!
Entschuldigen Sie, ich schreibe vom Übersetzer.
Jetzt ist und bei mir Red Pitaya. Hat die Experimente MDS und DBR gemacht. Welcher integrierter Schaltkreis im Schutz.
foto
https://yadi.sk/i/oco7xqPFtm3tK
https://yadi.sk/i/7wEkVInttm3t5
video
https://youtu.be/tPo2nHJWnos
73 de RZ3QS
Entschuldigen Sie, ich schreibe vom Übersetzer.
Jetzt ist und bei mir Red Pitaya. Hat die Experimente MDS und DBR gemacht. Welcher integrierter Schaltkreis im Schutz.
foto
https://yadi.sk/i/oco7xqPFtm3tK
https://yadi.sk/i/7wEkVInttm3t5
video
https://youtu.be/tPo2nHJWnos
73 de RZ3QS